Multi-partite GHZ entanglement on cloud superconducting processors collapses rapidly as qubit count grows. On a 156-qubit backend, 80-qubit raw fidelity was 0.013 (95% CI: −0.008 to 0.033). We present a modular, open-source pipeline combining zero-noise extrapolation (ZNE) with gate-level XY4 dynamical decoupling (DD). For N ∈ {4,8,16,32,64,80}, XY4 preserved parity longer at small N but yielded at most ~1% absolute gain. Exponential ZNE did not recover usable entanglement beyond 16 qubits. All code, raw counts, and figures are archived at DOI 10.5281/zenodo.20617751.

Introduction

The N-qubit GHZ state is a canonical probe of coherence and multipartite entanglement on NISQ hardware. Under realistic noise, global dephasing converts the state into a classical mixture; parity observables ⟨X^⊗N⟩ vanish as N grows.

|GHZ_N⟩ = (|0⟩^⊗N + |1⟩^⊗N) / √2

Can software-only error mitigation—ZNE combined with gate-level XY4 dynamical decoupling—restore practically useful entanglement without pulse-level hardware access?

Theoretical Framework

GHZ Fidelity Metric

F = (P(0…0) + P(1…1) + ⟨X^⊗N⟩) / 2

Dynamical Decoupling (XY4)

XY4 inserts periodic X–Y–X–Y inversion pulses that refocus qubit phases and filter low-frequency dephasing at the gate level—portable across cloud backends without pulse calibration.

Zero-Noise Extrapolation

ZNE amplifies effective noise via digital gate folding (odd λ ∈ {1,3,5}), measures fidelity at each scale, and extrapolates to λ = 0 using F(λ) = F₀ exp[−c(λ−1)].

Pipeline and Experimental Design

Executed on IBM Quantum ibm_marrakesh (156 qubits) for N ∈ {4,8,16,32,64,80}. Each size runs 12 circuits (baseline/DD × 3 noise scales × Z/X basis), 2000 shots each, with 500 multinomial bootstraps and GPU-accelerated exponential ZNE fitting.

Logical GHZ+XY4 circuit N=4 — **Figure 1 — Logical · N=4.** Minimal chain · XY4 train visible. Hadamard preparation, CNOT chain, XY4 decoupling, measurement — before backend transpilation.

Transpiled GHZ circuit N=80 — **Figure 2 — Transpiled · N=80.** Baseline GHZ preparation (λ=1, Z-basis). Scroll horizontally for full gate-level detail · click to zoom.

N=4

N=16

N=32

N=64

N=80

Results and Analysis

Raw Fidelity Collapse

Table 1. Raw GHZ fidelity (λ=1, no DD). Median [95% CI]

N	Raw F	Interpretation
4	0.950	Excellent
8	0.868	Good
16	0.481	Below 0.5 threshold
32	0.119	Broken
64	−0.007	Statistically zero
80	0.013	Statistically zero

Parity versus qubit count baseline vs XY4 DD — **Figure 3.** Parity ⟨X^⊗N⟩ — baseline vs. XY4 DD (λ=1).

Backend calibration snapshot T1 T2 gate errors — **Figure 4.** Backend calibration: T₁, T₂, per-qubit gate errors (~98% 2Q fidelity).

Dynamical Decoupling at N=8

8-qubit Z-basis counts baseline vs DD — **Figure 5.** 8-qubit Z-basis probabilities: baseline (top) vs. XY4 DD (bottom) at λ=1. DD concentrates weight on |0⟩⊗8 and |1⟩⊗8 without fully restoring |GHZ₈⟩.

Zero-Noise Extrapolation

Figure 6 · ZNE extrapolation panels — measured fidelities, exponential fits, λ=0 estimates

ZNE extrapolation panels for each qubit count

Table 2. Mitigated fidelity (DD+ZNE, extrapolated to λ=0)

N	Raw F	Mitigated F	Factor
4	0.950	0.957	1.01×
8	0.868	0.879	1.01×
16	0.481	0.477	0.99×
32	0.119	0.113	0.95×
64	−0.007	0.018	—
80	0.013	0.000	0.00×

Raw vs mitigated fidelity comparison — **Figure 7.** Raw (λ=1) vs. mitigated (DD+ZNE) fidelity with bootstrap error bars. Separation vanishes beyond N ≈ 8.

QBER and Quantum Networking

Table 3. QBER from mitigated DD+ZNE fidelity (11% QKD threshold)

N	Mitigated F	QBER	Secure?
4	0.957	≈4.3%	Yes
8	0.879	≈12.1%	Borderline
16	0.477	≈52.3%	No
32	0.113	≈88.7%	No
64	0.018	≈98.2%	No
80	0.000	≈100%	No

QBER from mitigated fidelity versus qubit count — **Figure 8.** QBER after mitigation vs. N. Dashed line: 11% QKD threshold. Only N=4 lies clearly below the security limit.

Complete Figure Atlas

Every circuit diagram, calibration snapshot, extrapolation panel, and networking plot from the paper — browse by category or thumbnail. Fifteen assets at publication resolution — click any figure to zoom full size.

Logical · N=4 — GHZ+XY4 logical layout before transpilation. · Click figure to open full resolution.

Conclusion

Gate-level DD+ZNE provides modest gains at small N (0.950 → 0.957 at 4 qubits) but cannot resurrect coherence at large N. Coherence resurrection at 64–80 qubits awaits lower two-qubit gate error or pulse-calibrated dynamical decoupling. The pipeline is a reproducible baseline archived at Zenodo.

Full paper, code & raw counts

DOI 10.5281/zenodo.20617751 · Open access · CC BY 4.0

View on Zenodo